Instructions

WebAssembly code consists of sequences of instructions. Its computational model is based on a stack machine in that instructions manipulate values on an implicit operand stack, consuming (popping) argument values and producing or returning (pushing) result values.

In addition to dynamic operands from the stack, some instructions also have static immediate arguments, typically indices or type annotations, which are part of the instruction itself.

Some instructions are structured in that they bracket nested sequences of instructions.

The following sections group instructions into a number of different categories.

Numeric Instructions

Numeric instructions provide basic operations over numeric values of specific type. These operations closely match respective operations available in hardware.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{nn},\mathit{mm}& ::=& \mathsf{32}|\mathsf{64}\\ & \mathit{sx}& ::=& \mathsf{u}|\mathsf{s}\\ & \mathit{instr}& ::=& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{const}\mathit{u}\mathit{nn}|\mathsf{f}\mathit{nn}\mathsf{.}\mathsf{const}\mathit{f}\mathit{nn}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathit{iunop}|\mathsf{f}\mathit{nn}\mathsf{.}\mathit{funop}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathit{ibinop}|\mathsf{f}\mathit{nn}\mathsf{.}\mathit{fbinop}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathit{itestop}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathit{irelop}|\mathsf{f}\mathit{nn}\mathsf{.}\mathit{frelop}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{extend}\mathsf{8}\mathsf{\_}\mathsf{s}|\mathsf{i}\mathit{nn}\mathsf{.}\mathsf{extend}\mathsf{16}\mathsf{\_}\mathsf{s}|\mathsf{i}\mathsf{64.}\mathsf{extend}\mathsf{32}\mathsf{\_}\mathsf{s}\\ & & |& \mathsf{i}\mathsf{32.}\mathsf{wrap}\mathsf{\_}\mathsf{i}\mathsf{64}|\mathsf{i}\mathsf{64.}\mathsf{extend}\mathsf{\_}\mathsf{i}\mathsf{32}\mathsf{\_}\mathit{sx}|\mathsf{i}\mathit{nn}\mathsf{.}\mathsf{trunc}\mathsf{\_}\mathsf{f}\mathit{mm}\mathsf{\_}\mathit{sx}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{trunc}\mathsf{\_}\mathsf{sat}\mathsf{\_}\mathsf{f}\mathit{mm}\mathsf{\_}\mathit{sx}\\ & & |& \mathsf{f}\mathsf{32.}\mathsf{demote}\mathsf{\_}\mathsf{f}\mathsf{64}|\mathsf{f}\mathsf{64.}\mathsf{promote}\mathsf{\_}\mathsf{f}\mathsf{32}|\mathsf{f}\mathit{nn}\mathsf{.}\mathsf{convert}\mathsf{\_}\mathsf{i}\mathit{mm}\mathsf{\_}\mathit{sx}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{reinterpret}\mathsf{\_}\mathsf{f}\mathit{nn}|\mathsf{f}\mathit{nn}\mathsf{.}\mathsf{reinterpret}\mathsf{\_}\mathsf{i}\mathit{nn}\\ & & |& \dots \\ & \mathit{iunop}& ::=& \mathsf{clz}|\mathsf{ctz}|\mathsf{popcnt}\\ & \mathit{ibinop}& ::=& \mathsf{add}|\mathsf{sub}|\mathsf{mul}|\mathsf{div}\mathsf{\_}\mathit{sx}|\mathsf{rem}\mathsf{\_}\mathit{sx}\\ & & |& \mathsf{and}|\mathsf{or}|\mathsf{xor}|\mathsf{shl}|\mathsf{shr}\mathsf{\_}\mathit{sx}|\mathsf{rotl}|\mathsf{rotr}\\ & \mathit{funop}& ::=& \mathsf{abs}|\mathsf{neg}|\mathsf{sqrt}|\mathsf{ceil}|\mathsf{floor}|\mathsf{trunc}|\mathsf{nearest}\\ & \mathit{fbinop}& ::=& \mathsf{add}|\mathsf{sub}|\mathsf{mul}|\mathsf{div}|\mathsf{min}|\mathsf{max}|\mathsf{copysign}\\ & \mathit{itestop}& ::=& \mathsf{eqz}\\ & \mathit{irelop}& ::=& \mathsf{eq}|\mathsf{ne}|\mathsf{lt}\mathsf{\_}\mathit{sx}|\mathsf{gt}\mathsf{\_}\mathit{sx}|\mathsf{le}\mathsf{\_}\mathit{sx}|\mathsf{ge}\mathsf{\_}\mathit{sx}\\ & \mathit{frelop}& ::=& \mathsf{eq}|\mathsf{ne}|\mathsf{lt}|\mathsf{gt}|\mathsf{le}|\mathsf{ge}\end{array}\end{array}$$

Numeric instructions are divided by number type. For each type, several subcategories can be distinguished:

• Constants: return a static constant.

• Unary Operations: consume one operand and produce one result of the respective type.

• Binary Operations: consume two operands and produce one result of the respective type.

• Tests: consume one operand of the respective type and produce a Boolean integer result.

• Comparisons: consume two operands of the respective type and produce a Boolean integer result.

• Conversions: consume a value of one type and produce a result of another (the source type of the conversion is the one after the “$\mathsf{\_}$”).

Some integer instructions come in two flavors, where a signedness annotation $\mathit{sx}$ distinguishes whether the operands are to be interpreted as unsigned or signed integers. For the other integer instructions, the use of two’s complement for the signed interpretation means that they behave the same regardless of signedness.

Conventions

Occasionally, it is convenient to group operators together according to the following grammar shorthands:

$$\begin{array}{r}\begin{array}{llll}& \mathit{unop}& ::=& \mathit{iunop}|\mathit{funop}|\mathsf{extend}N\mathsf{\_}\mathsf{s}\\ & \mathit{binop}& ::=& \mathit{ibinop}|\mathit{fbinop}\\ & \mathit{testop}& ::=& \mathit{itestop}\\ & \mathit{relop}& ::=& \mathit{irelop}|\mathit{frelop}\\ & \mathit{cvtop}& ::=& \mathsf{wrap}|\mathsf{extend}|\mathsf{trunc}|\mathsf{trunc}\mathsf{\_}\mathsf{sat}|\mathsf{convert}|\mathsf{demote}|\mathsf{promote}|\mathsf{reinterpret}\end{array}\end{array}$$

Vector Instructions

Vector instructions (also known as SIMD instructions, single instruction multiple data) provide basic operations over values of vector type.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{ishape}& ::=& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16}|\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2}\\ & \mathit{fshape}& ::=& \mathsf{f}\mathsf{32}\mathsf{x}\mathsf{4}|\mathsf{f}\mathsf{64}\mathsf{x}\mathsf{2}\\ & \mathit{shape}& ::=& \mathit{ishape}|\mathit{fshape}\\ & \mathit{half}& ::=& \mathsf{low}|\mathsf{high}\\ & \mathit{laneidx}& ::=& \mathit{u}\mathit{8}\end{array}\end{array}$$

$$\begin{array}{r}\begin{array}{llcl}& \mathit{instr}& ::=& \dots \\ & & |& \mathsf{v}\mathsf{128.}\mathsf{const}\mathit{i}\mathit{128}\\ & & |& \mathsf{v}\mathsf{128.}\mathit{vvunop}\\ & & |& \mathsf{v}\mathsf{128.}\mathit{vvbinop}\\ & & |& \mathsf{v}\mathsf{128.}\mathit{vvternop}\\ & & |& \mathsf{v}\mathsf{128.}\mathit{vvtestop}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathsf{shuffle}{\mathit{laneidx}}^{16}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathsf{swizzle}\\ & & |& \mathit{shape}\mathsf{.}\mathsf{splat}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathsf{extract}\mathsf{\_}\mathsf{lane}\mathsf{\_}\mathit{sx}\mathit{laneidx}|\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{extract}\mathsf{\_}\mathsf{lane}\mathsf{\_}\mathit{sx}\mathit{laneidx}\\ & & |& \mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{extract}\mathsf{\_}\mathsf{lane}\mathit{laneidx}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{extract}\mathsf{\_}\mathsf{lane}\mathit{laneidx}\\ & & |& \mathit{fshape}\mathsf{.}\mathsf{extract}\mathsf{\_}\mathsf{lane}\mathit{laneidx}\\ & & |& \mathit{shape}\mathsf{.}\mathsf{replace}\mathsf{\_}\mathsf{lane}\mathit{laneidx}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16}\mathsf{.}\mathit{virelop}|\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8}\mathsf{.}\mathit{virelop}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}\mathsf{.}\mathit{virelop}\\ & & |& \mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{eq}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{ne}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{lt}\mathsf{\_}\mathsf{s}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{gt}\mathsf{\_}\mathsf{s}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{le}\mathsf{\_}\mathsf{s}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{ge}\mathsf{\_}\mathsf{s}\\ & & |& \mathit{fshape}\mathsf{.}\mathit{vfrelop}\\ & & |& \mathit{ishape}\mathsf{.}\mathit{viunop}|\mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathsf{popcnt}\\ & & |& \mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{q}\mathsf{15}\mathsf{mulr}\mathsf{\_}\mathsf{sat}\mathsf{\_}\mathsf{s}\\ & & |& \mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{dot}\mathsf{\_}\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8}\mathsf{\_}\mathsf{s}\\ & & |& \mathit{fshape}\mathsf{.}\mathit{vfunop}\\ & & |& \mathit{ishape}\mathsf{.}\mathit{vitestop}\\ & & |& \mathit{ishape}\mathsf{.}\mathsf{bitmask}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathsf{narrow}\mathsf{\_}\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8}\mathsf{\_}\mathit{sx}|\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{narrow}\mathsf{\_}\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}\mathsf{\_}\mathit{sx}\\ & & |& \mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{extend}\mathsf{\_}\mathit{half}\mathsf{\_}\mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16}\mathsf{\_}\mathit{sx}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{extend}\mathsf{\_}\mathit{half}\mathsf{\_}\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8}\mathsf{\_}\mathit{sx}\\ & & |& \mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{extend}\mathsf{\_}\mathit{half}\mathsf{\_}\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}\mathsf{\_}\mathit{sx}\\ & & |& \mathit{ishape}\mathsf{.}\mathit{vishiftop}\\ & & |& \mathit{ishape}\mathsf{.}\mathit{vibinop}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathit{viminmaxop}|\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathit{viminmaxop}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathit{viminmaxop}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathit{visatbinop}|\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathit{visatbinop}\\ & & |& \mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{mul}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{mul}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{mul}\\ & & |& \mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16.}\mathsf{avgr}\mathsf{\_}\mathsf{u}|\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{avgr}\mathsf{\_}\mathsf{u}\\ & & |& \mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{extmul}\mathsf{\_}\mathit{half}\mathsf{\_}\mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16}\mathsf{\_}\mathit{sx}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{extmul}\mathsf{\_}\mathit{half}\mathsf{\_}\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8}\mathsf{\_}\mathit{sx}|\mathsf{i}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{extmul}\mathsf{\_}\mathit{half}\mathsf{\_}\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}\mathsf{\_}\mathit{sx}\\ & & |& \mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8.}\mathsf{extadd}\mathsf{\_}\mathsf{pairwise}\mathsf{\_}\mathsf{i}\mathsf{8}\mathsf{x}\mathsf{16}\mathsf{\_}\mathit{sx}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{extadd}\mathsf{\_}\mathsf{pairwise}\mathsf{\_}\mathsf{i}\mathsf{16}\mathsf{x}\mathsf{8}\mathsf{\_}\mathit{sx}\\ & & |& \mathit{fshape}\mathsf{.}\mathit{vfbinop}\\ & & |& \mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{trunc}\mathsf{\_}\mathsf{sat}\mathsf{\_}\mathsf{f}\mathsf{32}\mathsf{x}\mathsf{4}\mathsf{\_}\mathit{sx}|\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{trunc}\mathsf{\_}\mathsf{sat}\mathsf{\_}\mathsf{f}\mathsf{64}\mathsf{x}\mathsf{2}\mathsf{\_}\mathit{sx}\mathsf{\_}\mathsf{zero}\\ & & |& \mathsf{f}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{convert}\mathsf{\_}\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}\mathsf{\_}\mathit{sx}|\mathsf{f}\mathsf{32}\mathsf{x}\mathsf{4.}\mathsf{demote}\mathsf{\_}\mathsf{f}\mathsf{64}\mathsf{x}\mathsf{2}\mathsf{\_}\mathsf{zero}\\ & & |& \mathsf{f}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{convert}\mathsf{\_}\mathsf{low}\mathsf{\_}\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}\mathsf{\_}\mathit{sx}|\mathsf{f}\mathsf{64}\mathsf{x}\mathsf{2.}\mathsf{promote}\mathsf{\_}\mathsf{low}\mathsf{\_}\mathsf{f}\mathsf{32}\mathsf{x}\mathsf{4}\\ & & |& \dots \end{array}\end{array}$$

$$\begin{array}{r}\begin{array}{llcl}& \mathit{vvunop}& ::=& \mathsf{not}\\ & \mathit{vvbinop}& ::=& \mathsf{and}|\mathsf{andnot}|\mathsf{or}|\mathsf{xor}\\ & \mathit{vvternop}& ::=& \mathsf{bitselect}\\ & \mathit{vvtestop}& ::=& \mathsf{any}\mathsf{\_}\mathsf{true}\\ & \mathit{vitestop}& ::=& \mathsf{all}\mathsf{\_}\mathsf{true}\\ & \mathit{virelop}& ::=& \mathsf{eq}|\mathsf{ne}|\mathsf{lt}\mathsf{\_}\mathit{sx}|\mathsf{gt}\mathsf{\_}\mathit{sx}|\mathsf{le}\mathsf{\_}\mathit{sx}|\mathsf{ge}\mathsf{\_}\mathit{sx}\\ & \mathit{vfrelop}& ::=& \mathsf{eq}|\mathsf{ne}|\mathsf{lt}|\mathsf{gt}|\mathsf{le}|\mathsf{ge}\\ & \mathit{viunop}& ::=& \mathsf{abs}|\mathsf{neg}\\ & \mathit{vibinop}& ::=& \mathsf{add}|\mathsf{sub}\\ & \mathit{viminmaxop}& ::=& \mathsf{min}\mathsf{\_}\mathit{sx}|\mathsf{max}\mathsf{\_}\mathit{sx}\\ & \mathit{visatbinop}& ::=& \mathsf{add}\mathsf{\_}\mathsf{sat}\mathsf{\_}\mathit{sx}|\mathsf{sub}\mathsf{\_}\mathsf{sat}\mathsf{\_}\mathit{sx}\\ & \mathit{vishiftop}& ::=& \mathsf{shl}|\mathsf{shr}\mathsf{\_}\mathit{sx}\\ & \mathit{vfunop}& ::=& \mathsf{abs}|\mathsf{neg}|\mathsf{sqrt}|\mathsf{ceil}|\mathsf{floor}|\mathsf{trunc}|\mathsf{nearest}\\ & \mathit{vfbinop}& ::=& \mathsf{add}|\mathsf{sub}|\mathsf{mul}|\mathsf{div}|\mathsf{min}|\mathsf{max}|\mathsf{pmin}|\mathsf{pmax}\end{array}\end{array}$$

Vector instructions have a naming convention involving a prefix that determines how their operands will be interpreted. This prefix describes the shape of the operand, written $t\mathsf{x}N$, and consisting of a packed numeric type $t$ and the number of lanes $N$ of that type. Operations are performed point-wise on the values of each lane.

Note

For example, the shape $\mathsf{i}\mathsf{32}\mathsf{x}\mathsf{4}$ interprets the operand as four $\mathit{i}\mathit{32}$ values, packed into an $\mathit{i}\mathit{128}$. The bitwidth of the numeric type $t$ times $N$ always is 128.

Instructions prefixed with $\mathsf{v}\mathsf{128}$ do not involve a specific interpretation, and treat the $\mathsf{v}\mathsf{128}$ as an $\mathit{i}\mathit{128}$ value or a vector of 128 individual bits.

Vector instructions can be grouped into several subcategories:

• Constants: return a static constant.

• Unary Operations: consume one $\mathsf{v}\mathsf{128}$ operand and produce one $\mathsf{v}\mathsf{128}$ result.

• Binary Operations: consume two $\mathsf{v}\mathsf{128}$ operands and produce one $\mathsf{v}\mathsf{128}$ result.

• Ternary Operations: consume three $\mathsf{v}\mathsf{128}$ operands and produce one $\mathsf{v}\mathsf{128}$ result.

• Tests: consume one $\mathsf{v}\mathsf{128}$ operand and produce a Boolean integer result.

• Shifts: consume a $\mathsf{v}\mathsf{128}$ operand and a $\mathit{i}\mathit{32}$ operand, producing one $\mathsf{v}\mathsf{128}$ result.

• Splats: consume a value of numeric type and produce a $\mathsf{v}\mathsf{128}$ result of a specified shape.

• Extract lanes: consume a $\mathsf{v}\mathsf{128}$ operand and return the numeric value in a given lane.

• Replace lanes: consume a $\mathsf{v}\mathsf{128}$ operand and a numeric value for a given lane, and produce a $\mathsf{v}\mathsf{128}$ result.

Some vector instructions have a signedness annotation $\mathit{sx}$ which distinguishes whether the elements in the operands are to be interpreted as unsigned or signed integers. For the other vector instructions, the use of two’s complement for the signed interpretation means that they behave the same regardless of signedness.

Conventions

Occasionally, it is convenient to group operators together according to the following grammar shorthands:

$$\begin{array}{r}\begin{array}{llll}& \mathit{vunop}& ::=& \mathit{viunop}|\mathit{vfunop}|\mathsf{popcnt}\\ & \mathit{vbinop}& ::=& \mathit{vibinop}|\mathit{vfbinop}\\ & & |& \mathit{viminmaxop}|\mathit{visatbinop}\\ & & |& \mathsf{mul}|\mathsf{avgr}\mathsf{\_}\mathsf{u}|\mathsf{q}\mathsf{15}\mathsf{mulr}\mathsf{\_}\mathsf{sat}\mathsf{\_}\mathsf{s}\\ & \mathit{vtestop}& ::=& \mathit{vitestop}\\ & \mathit{vrelop}& ::=& \mathit{virelop}|\mathit{vfrelop}\\ & \mathit{vcvtop}& ::=& \mathsf{extend}|\mathsf{trunc}\mathsf{\_}\mathsf{sat}|\mathsf{convert}|\mathsf{demote}|\mathsf{promote}\end{array}\end{array}$$

Reference Instructions

Instructions in this group are concerned with accessing references.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{instr}& ::=& \dots \\ & & |& \mathsf{ref}\mathsf{.}\mathsf{null}\mathit{reftype}\\ & & |& \mathsf{ref}\mathsf{.}\mathsf{is}\mathsf{\_}\mathsf{null}\\ & & |& \mathsf{ref}\mathsf{.}\mathsf{func}\mathit{funcidx}\end{array}\end{array}$$

These instructions produce a null value, check for a null value, or produce a reference to a given function, respectively.

Parametric Instructions

Instructions in this group can operate on operands of any value type.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{instr}& ::=& \dots \\ & & |& \mathsf{drop}\\ & & |& \mathsf{select}({\mathit{valtype}}^{\ast }{)}^{?}\end{array}\end{array}$$

The $\mathsf{drop}$ instruction simply throws away a single operand.

The $\mathsf{select}$ instruction selects one of its first two operands based on whether its third operand is zero or not. It may include a value type determining the type of these operands. If missing, the operands must be of numeric type.

Note

In future versions of WebAssembly, the type annotation on $\mathsf{select}$ may allow for more than a single value being selected at the same time.

Variable Instructions

Variable instructions are concerned with access to local or global variables.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{instr}& ::=& \dots \\ & & |& \mathsf{local}\mathsf{.}\mathsf{get}\mathit{localidx}\\ & & |& \mathsf{local}\mathsf{.}\mathsf{set}\mathit{localidx}\\ & & |& \mathsf{local}\mathsf{.}\mathsf{tee}\mathit{localidx}\\ & & |& \mathsf{global}\mathsf{.}\mathsf{get}\mathit{globalidx}\\ & & |& \mathsf{global}\mathsf{.}\mathsf{set}\mathit{globalidx}\end{array}\end{array}$$

These instructions get or set the values of variables, respectively. The $\mathsf{local}\mathsf{.}\mathsf{tee}$ instruction is like $\mathsf{local}\mathsf{.}\mathsf{set}$ but also returns its argument.

Table Instructions

Instructions in this group are concerned with tables table.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{instr}& ::=& \dots \\ & & |& \mathsf{table}\mathsf{.}\mathsf{get}\mathit{tableidx}\\ & & |& \mathsf{table}\mathsf{.}\mathsf{set}\mathit{tableidx}\\ & & |& \mathsf{table}\mathsf{.}\mathsf{size}\mathit{tableidx}\\ & & |& \mathsf{table}\mathsf{.}\mathsf{grow}\mathit{tableidx}\\ & & |& \mathsf{table}\mathsf{.}\mathsf{fill}\mathit{tableidx}\\ & & |& \mathsf{table}\mathsf{.}\mathsf{copy}\mathit{tableidx}\mathit{tableidx}\\ & & |& \mathsf{table}\mathsf{.}\mathsf{init}\mathit{tableidx}\mathit{elemidx}\\ & & |& \mathsf{elem}\mathsf{.}\mathsf{drop}\mathit{elemidx}\end{array}\end{array}$$

The $\mathsf{table}\mathsf{.}\mathsf{get}$ and $\mathsf{table}\mathsf{.}\mathsf{set}$ instructions load or store an element in a table, respectively.

The $\mathsf{table}\mathsf{.}\mathsf{size}$ instruction returns the current size of a table. The $\mathsf{table}\mathsf{.}\mathsf{grow}$ instruction grows table by a given delta and returns the previous size, or $-1$ if enough space cannot be allocated. It also takes an initialization value for the newly allocated entries.

The $\mathsf{table}\mathsf{.}\mathsf{fill}$ instruction sets all entries in a range to a given value.

The $\mathsf{table}\mathsf{.}\mathsf{copy}$ instruction copies elements from a source table region to a possibly overlapping destination region; the first index denotes the destination. The $\mathsf{table}\mathsf{.}\mathsf{init}$ instruction copies elements from a passive element segment into a table. The $\mathsf{elem}\mathsf{.}\mathsf{drop}$ instruction prevents further use of a passive element segment. This instruction is intended to be used as an optimization hint. After an element segment is dropped its elements can no longer be retrieved, so the memory used by this segment may be freed.

An additional instruction that accesses a table is the control instruction $\mathsf{call}\mathsf{\_}\mathsf{indirect}$.

Memory Instructions

Instructions in this group are concerned with linear memory.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{memarg}& ::=& \{\mathsf{offset}\mathit{u}\mathit{32},\mathsf{align}\mathit{u}\mathit{32}\}\\ & \mathit{ww}& ::=& 8|16|32|64\\ & \mathit{instr}& ::=& \dots \\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{load}\mathit{memarg}|\mathsf{f}\mathit{nn}\mathsf{.}\mathsf{load}\mathit{memarg}|\mathsf{v}\mathsf{128.}\mathsf{load}\mathit{memarg}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{store}\mathit{memarg}|\mathsf{f}\mathit{nn}\mathsf{.}\mathsf{store}\mathit{memarg}|\mathsf{v}\mathsf{128.}\mathsf{store}\mathit{memarg}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{load}\mathsf{8}\mathsf{\_}\mathit{sx}\mathit{memarg}|\mathsf{i}\mathit{nn}\mathsf{.}\mathsf{load}\mathsf{16}\mathsf{\_}\mathit{sx}\mathit{memarg}|\mathsf{i}\mathsf{64.}\mathsf{load}\mathsf{32}\mathsf{\_}\mathit{sx}\mathit{memarg}\\ & & |& \mathsf{i}\mathit{nn}\mathsf{.}\mathsf{store}\mathsf{8}\mathit{memarg}|\mathsf{i}\mathit{nn}\mathsf{.}\mathsf{store}\mathsf{16}\mathit{memarg}|\mathsf{i}\mathsf{64.}\mathsf{store}\mathsf{32}\mathit{memarg}\\ & & |& \mathsf{v}\mathsf{128.}\mathsf{load}\mathsf{8}\mathsf{x}\mathsf{8}\mathsf{\_}\mathit{sx}\mathit{memarg}|\mathsf{v}\mathsf{128.}\mathsf{load}\mathsf{16}\mathsf{x}\mathsf{4}\mathsf{\_}\mathit{sx}\mathit{memarg}|\mathsf{v}\mathsf{128.}\mathsf{load}\mathsf{32}\mathsf{x}\mathsf{2}\mathsf{\_}\mathit{sx}\mathit{memarg}\\ & & |& \mathsf{v}\mathsf{128.}\mathsf{load}\mathsf{32}\mathsf{\_}\mathsf{zero}\mathit{memarg}|\mathsf{v}\mathsf{128.}\mathsf{load}\mathsf{64}\mathsf{\_}\mathsf{zero}\mathit{memarg}\\ & & |& \mathsf{v}\mathsf{128.}\mathsf{load}\mathit{ww}\mathsf{\_}\mathsf{splat}\mathit{memarg}\\ & & |& \mathsf{v}\mathsf{128.}\mathsf{load}\mathit{ww}\mathsf{\_}\mathsf{lane}\mathit{memarg}\mathit{laneidx}|\mathsf{v}\mathsf{128.}\mathsf{store}\mathit{ww}\mathsf{\_}\mathsf{lane}\mathit{memarg}\mathit{laneidx}\\ & & |& \mathsf{memory}\mathsf{.}\mathsf{size}\\ & & |& \mathsf{memory}\mathsf{.}\mathsf{grow}\\ & & |& \mathsf{memory}\mathsf{.}\mathsf{fill}\\ & & |& \mathsf{memory}\mathsf{.}\mathsf{copy}\\ & & |& \mathsf{memory}\mathsf{.}\mathsf{init}\mathit{dataidx}\\ & & |& \mathsf{data}\mathsf{.}\mathsf{drop}\mathit{dataidx}\end{array}\end{array}$$

Memory is accessed with $\mathsf{load}$ and $\mathsf{store}$ instructions for the different number types. They all take a memory immediate $\mathit{memarg}$ that contains an address offset and the expected alignment (expressed as the exponent of a power of 2). Integer loads and stores can optionally specify a storage size that is smaller than the bit width of the respective value type. In the case of loads, a sign extension mode $\mathit{sx}$ is then required to select appropriate behavior.

Vector loads can specify a shape that is half the bit width of $\mathsf{v}\mathsf{128}$. Each lane is half its usual size, and the sign extension mode $\mathit{sx}$ then specifies how the smaller lane is extended to the larger lane. Alternatively, vector loads can perform a splat, such that only a single lane of the specified storage size is loaded, and the result is duplicated to all lanes.

The static address offset is added to the dynamic address operand, yielding a 33 bit effective address that is the zero-based index at which the memory is accessed. All values are read and written in little endian byte order. A trap results if any of the accessed memory bytes lies outside the address range implied by the memory’s current size.

Note

Future versions of WebAssembly might provide memory instructions with 64 bit address ranges.

The $\mathsf{memory}\mathsf{.}\mathsf{size}$ instruction returns the current size of a memory. The $\mathsf{memory}\mathsf{.}\mathsf{grow}$ instruction grows memory by a given delta and returns the previous size, or $-1$ if enough memory cannot be allocated. Both instructions operate in units of page size.

The $\mathsf{memory}\mathsf{.}\mathsf{fill}$ instruction sets all values in a region to a given byte. The $\mathsf{memory}\mathsf{.}\mathsf{copy}$ instruction copies data from a source memory region to a possibly overlapping destination region. The $\mathsf{memory}\mathsf{.}\mathsf{init}$ instruction copies data from a passive data segment into a memory. The $\mathsf{data}\mathsf{.}\mathsf{drop}$ instruction prevents further use of a passive data segment. This instruction is intended to be used as an optimization hint. After a data segment is dropped its data can no longer be retrieved, so the memory used by this segment may be freed.

Note

In the current version of WebAssembly, all memory instructions implicitly operate on memory index $0$. This restriction may be lifted in future versions.

Control Instructions

Instructions in this group affect the flow of control.

$$\begin{array}{r}\begin{array}{llcl}& \mathit{blocktype}& ::=& \mathit{typeidx}|{\mathit{valtype}}^{?}\\ & \mathit{instr}& ::=& \dots \\ & & |& \mathsf{nop}\\ & & |& \mathsf{unreachable}\\ & & |& \mathsf{block}\mathit{blocktype}{\mathit{instr}}^{\ast }\mathsf{end}\\ & & |& \mathsf{loop}\mathit{blocktype}{\mathit{instr}}^{\ast }\mathsf{end}\\ & & |& \mathsf{if}\mathit{blocktype}{\mathit{instr}}^{\ast }\mathsf{else}{\mathit{instr}}^{\ast }\mathsf{end}\\ & & |& \mathsf{br}\mathit{labelidx}\\ & & |& \mathsf{br}\mathsf{\_}\mathsf{if}\mathit{labelidx}\\ & & |& \mathsf{br}\mathsf{\_}\mathsf{table}\mathit{vec}(\mathit{labelidx})\mathit{labelidx}\\ & & |& \mathsf{return}\\ & & |& \mathsf{call}\mathit{funcidx}\\ & & |& \mathsf{call}\mathsf{\_}\mathsf{indirect}\mathit{tableidx}\mathit{typeidx}\end{array}\end{array}$$

The $\mathsf{nop}$ instruction does nothing.

The $\mathsf{unreachable}$ instruction causes an unconditional trap.

The $\mathsf{block}$, $\mathsf{loop}$ and $\mathsf{if}$ instructions are structured instructions. They bracket nested sequences of instructions, called blocks, terminated with, or separated by, $\mathsf{end}$ or $\mathsf{else}$ pseudo-instructions. As the grammar prescribes, they must be well-nested.

A structured instruction can consume input and produce output on the operand stack according to its annotated block type. It is given either as a type index that refers to a suitable function type, or as an optional value type inline, which is a shorthand for the function type $[]\to [{\mathit{valtype}}^{?}]$.

Each structured control instruction introduces an implicit label. Labels are targets for branch instructions that reference them with label indices. Unlike with other index spaces, indexing of labels is relative by nesting depth, that is, label $0$ refers to the innermost structured control instruction enclosing the referring branch instruction, while increasing indices refer to those farther out. Consequently, labels can only be referenced from within the associated structured control instruction. This also implies that branches can only be directed outwards, “breaking” from the block of the control construct they target. The exact effect depends on that control construct. In case of $\mathsf{block}$ or $\mathsf{if}$ it is a forward jump, resuming execution after the matching $\mathsf{end}$. In case of $\mathsf{loop}$ it is a backward jump to the beginning of the loop.

Note

This enforces structured control flow. Intuitively, a branch targeting a $\mathsf{block}$ or $\mathsf{if}$ behaves like a $\mathsf{break}$ statement in most C-like languages, while a branch targeting a $\mathsf{loop}$ behaves like a $\mathsf{continue}$ statement.

Branch instructions come in several flavors: $\mathsf{br}$ performs an unconditional branch, $\mathsf{br}\mathsf{\_}\mathsf{if}$ performs a conditional branch, and $\mathsf{br}\mathsf{\_}\mathsf{table}$ performs an indirect branch through an operand indexing into the label vector that is an immediate to the instruction, or to a default target if the operand is out of bounds. The $\mathsf{return}$ instruction is a shortcut for an unconditional branch to the outermost block, which implicitly is the body of the current function. Taking a branch unwinds the operand stack up to the height where the targeted structured control instruction was entered. However, branches may additionally consume operands themselves, which they push back on the operand stack after unwinding. Forward branches require operands according to the output of the targeted block’s type, i.e., represent the values produced by the terminated block. Backward branches require operands according to the input of the targeted block’s type, i.e., represent the values consumed by the restarted block.

The $\mathsf{call}$ instruction invokes another function, consuming the necessary arguments from the stack and returning the result values of the call. The $\mathsf{call}\mathsf{\_}\mathsf{indirect}$ instruction calls a function indirectly through an operand indexing into a table that is denoted by a table index and must have type $\mathsf{funcref}$. Since it may contain functions of heterogeneous type, the callee is dynamically checked against the function type indexed by the instruction’s second immediate, and the call is aborted with a trap if it does not match.

Expressions

Function bodies, initialization values for globals, elements and offsets of element segments, and offsets of data segments are given as expressions, which are sequences of instructions terminated by an $\mathsf{end}$ marker.

$$\begin{array}{r}\begin{array}{llll}& \mathit{expr}& ::=& {\mathit{instr}}^{\ast }\mathsf{end}\end{array}\end{array}$$

In some places, validation restricts expressions to be constant, which limits the set of allowable instructions.